Design of ESD protections for ECG applications

Ponencia en Congreso:
Design of ESD protections for ECG applications

dc.contributor.author	Gardella, Pablo
dc.contributor.author	Baez, Eduardo
dc.contributor.author	Cesaretti, Juan Manuel
dc.date.accessioned	2020-06-24T16:00:33Z
dc.date.available	2020-06-24T16:00:33Z
dc.date.issued	2020-02
dc.description.abstract	"This paper presents the design of Electrostatic Discharge (ESD) protections for a remote Electroencephalograph (ECG). Design and layout guidelines are analyzed to improve the ESD robustness of a Grounded-Gate NMOS (GGNMOS) cell based on a single well CMOS-only process. Experimental validation is done by means of a Time Domain Reflectometry (TDR) technique known as Transmission Line Pulse (TLP) testing. The silicon implementation of the proposed design passes ±3700V in the Human-Body Model (HBM)."	en
dc.identifier.isbn	978-1728-16-195-2
dc.identifier.uri	http://ri.itba.edu.ar/handle/123456789/2216
dc.language.iso	en	en
dc.relation	info:eu-repo/semantics/altIdentifier/doi/10.1109/CAE48787.2020.9046370
dc.subject	ELECTROENCEFALOGRAFIA	es
dc.subject	CIRCUITOS INTEGRADOS	es
dc.title	Design of ESD protections for ECG applications	en
dc.type	Ponencias en Congresos	es
dc.type	info:eu-repo/semantics/acceptedVersion
dspace.entity.type	Ponencia en Congreso
itba.description.filiation	Fil: Gardella, Pablo Instituto Tecnológico de Buenos Aires; Argentina.
itba.description.filiation	Fil: Baez, Eduardo. Instituto Tecnológico de Buenos Aires; Argentina.
itba.description.filiation	Fil: Cesaretti, Juan Manual. Instituto Tecnológico de Buenos Aires; Argentina.